? 2002 fairchild semiconductor corporation ds005894 www.fairchildsemi.com october 1987 revised may 2002 mm74C157 quad 2-input multiplexers mm74C157 quad 2-input multiplexers general description the mm74C157 multiplexers are monolithic complemen- tary mos (cmos) integrated circuits constructed with n- and p-channel enhancement transistors. they consist of four 2-input multiplexers with common select and enable inputs. when the enable input is at logical ?0? the four out- puts assume the values as selected from the inputs. when the enable input is at logical ?1?, the outputs assume logical ?0?. select decoding is done internally resulting in a single select input only. features supply voltage range: 3v to 15v high noise immunity: 0.45 v cc (typ.) low power: 50 nw (typ.) tenth power ttl compatible: drive 2 lpttl loads ordering code: connection diagram top view logic diagram truth table order number package number package description mm74C157n n16e 16-lead plastic dual-in-line package (pdip), jedec ms-001, 0.300" wide enable select a b output y 1xxx0 000x0 001x1 01x00 01x11 free datasheet http://
www.fairchildsemi.com 2 mm74C157 absolute maximum ratings (note 1) note 1: ? absolute maximum ratings ? are those values beyond which the safety of the device cannot be guaranteed. except for ? operating tempera- ture range ? they are not meant to imply that the devices should be oper- ated at these limits. the table of ? electrical characteristics ? provides conditions for actual device operation. dc electrical characteristics min/max limits apply across temperature range unless otherwise noted voltage at any pin ? 0.3v to v cc + 0.3v operating temperature range ? 55 c to + 125 c storage temperature range ? 65 c to + 150 c maximum v cc voltage 18v power dissipation (p d ) dual-in-line 700 mw small outline 500 mw operating v cc range 3v to 15v lead temperature (soldering, 10 seconds) 260 c symbol parameter conditions min typ max units cmos to cmos v in(1) logical ? 1 ? input voltage v cc = 5v 3.5 v v cc = 10v 8.0 v in(0) logical ? 0 ? input voltage v cc = 5v 1.5 v v cc = 10v 2.0 v out(1) logical ? 1 ? output voltage v cc = 5v 4.5 v v cc = 10v 9.0 v out(0) logical ? 0 ? output voltage v cc = 5v 0.5 v v cc = 10v 1.0 i in(1) logical ? 1 ? input current v cc = 15v 0.005 1.0 a i in(0) logical ? 0 ? input current v cc = 15v ? 1.0 ? 0.005 a i cc supply current v cc = 15v 0.05 60 a cmos to tenth power interface v in(1) logical ? 1 ? input voltage v cc = 4.75v v cc ? 1.5 v v in(0) logical ? 0 ? input voltage v cc = 4.75v 0.8 v v out(1) logical ? 1 ? output voltage v cc = 4.75v, i o = ? 360 a2.4 v v out(0) logical ? 0 ? output voltage v cc = 4.75v, i o = 360 a0.4v output drive (see family characteristics data sheet) (short circuit current) i source output source current v cc = 5v, v in(0) = 0v ? 1.75 ma t a = 25 c, v out = 0v i source output source current v cc = 10v, v in(0) = 0v ? 8.0 ma t a = 25 c, v out = 0v i sink output sink current v cc = 5v, v in(1) = 5v 1.75 ma t a = 25 c, v out = v cc i sink output sink current v cc = 10v, v in(1) = 10v 8.0 ma t a = 25 c, v out = v cc free datasheet http://
3 www.fairchildsemi.com mm74C157 ac electrical characteristics (note 2) t a = 25 c, c l = 50 pf, unless otherwise specified note 2: ac parameters are guaranteed by dc correlated testing. note 3: capacitance is guaranteed by periodic testing. note 4: c pd determines the no load ac power consumption of any cmos device. for complete explanation, see family characteristics, application note an-90. typical applications 74l compatibility guaranteed noise margin as a function of v cc symbol parameter conditions min typ max units t pd0 , t pd1 propagation delay from v cc = 5.0v 150 250 ns data to output v cc = 10v 70 110 t pd0 , t pd1 propagation delay from v cc = 5v 180 300 ns select to output v cc = 10v 80 130 t pd0 , t pd1 propagation delay from v cc = 5v 180 300 ns enable to output v cc = 10v 80 130 c in input capacitance (note 3) 5 pf c pd power dissipation (note 4) 20 pf capacitance free datasheet http://
www.fairchildsemi.com 4 mm74C157 quad 2-input multiplexers physical dimensions inches (millimeters) unless otherwise noted 16-lead plastic dual-in-line package (pdip), jedec ms-001, 0.300" wide package number n16e fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and fairchild reserves the right at any time without notice to change said circuitry and specifications. life support policy fairchild ? s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. a critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com free datasheet http://
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